The present invention will be described in use with a magnetic recording medium, but it should be understood that it may be employed with optical recording arrangements or any serial communication channel. In data processing systems (which employ magnetic recording means to store data), the data words from the CPU, or somewhere in the data processing circuitry, are encoded into coded words before such information signals are transmitted to the recording head to be placed on the recording medium. Since a binary ONE is generally recorded as a magnetic flux transition and a binary ZERO as a non-(magnetic flux) transistion, there is normally required a certain number of ZEROS (minimum ZEROS) between the binary ONES in order to reduce the interference that would occur if the flux transitions were in adjacent positions on the magnetic recording medium. On the other hand, there is a limitation on the number of ZEROS (maximum ZEROS) that can be usefully employed because it is generally considered preferable to have a self-clocking system and if there is a large string of ZEROS between ONES, the system tends to lose, or diminish, its self-clocking capability. Very often the minimum number of ZEROS is referred to as the "d" constraint, while the maximum number of ZEROS is referred to as the "k" constraint. A coding arrangement which has a fixed d, k is referred to as a run-length-limited code. Such a code is further defined by whether or not the number of bits in a data word is fixed or is of different lengths. If the number of bits in the data words used actually vary, then the data words are referred to as variable length words. If the number of bits is fixed, the data words are referred to as fixed length words. It has been determined that there are certain advantages to employing variable length words with run-length-limited codes and it is to this combination that the present arrangement is directed.
There are many coding arrangements which attempt to compromise the constraints by providing by a high-minimum (d) number of ZEROS to reduce errors which occur by flux transition interferences and a low-maximum (k) number of ZEROS to assure good self-clocking. All such coding arrangements of variable length words are subject to error propagation. In the prior art coding arrangements for variable length words an encoded bit error (i.e. the bit on the magnetic recording medium being in error), would very likely result in many data bit errors during the decoding operation. The present code and the present circuitry for encoding and decoding that code are directed to employing an acceptable minimum ZERO factor (d=1) while employing an acceptable maximum ZERO factor (k =7). In addition, the present system employs an arrangement to simplify the encoding and decoding operations by having certain coded word bits, for each data word which is encoded, remain identical in binary values to the data word bits which they represent. In the present system, the decoding is simplified and the code arrangement as implemented by the hardware reduces error propagation.